Where can I find a schematic for the USB-I2C/IO Rev. C1 board?

What software (driver, dll, etc.) do I use with the new USB-I2C/IO Rev. C1 board?

Do you have Vista drivers for the Rev. C1 board?

Where are all the new features?

What new features are planned, and when can we actually expect them?

Q:  Where can I find a schematic for the USB-I2C/IO Rev. C1 board?

A: There is a link to a pdf version of the schematic on the main USB-I2C/IO product web-page in the "Hardware" section.

Q:  What software (driver, dll, etc.) do I use with the new USB-I2C/IO Rev. C1 board?

A:  The USB-I2C/IO Rev. C1 board is designed to be backward compatible with previous revisions.  For now, our intent is for customers to use the driver and dll contained in the rev_306.zip file on the downloads page.  Customers using the board with Vista should use the driver and dll contained in the VistaDrv.zip file.

Q:  Do you have Vista drivers for the Rev. C1 board?

A:  Yes, we have a 32 bit version Vista driver in the file VistaDrv.zip available from the downloads web-directory listing.   This driver also works with previous revision B boards.

Q:  Where are all the new features?

A:  As the revision C1 board is intended to be a drop-in replacement for previous revisions, our focus in the initial firmware release was backwards compatibility.  That said... there are some new features already implemented in the firmware, and we will be adding support for more new features in future software releases.  One feature immediately available is access to more General Purpose I/O pins.  The upper 3 nibbles in the I/O function calls (config, write, read) were previously unused, now they map to pins.  The most significant byte of the 32 bit data and mask values map to the Port D pins on J2, and the next significant nibble maps to the remaining 4 pins of Port 0 (micro-controller) which map to 4 pins on the two 5 pin headers J1 and J4.  Try it.  There is also functional support for changing the speed of the I2C/SMBUS clock.  We will be releasing a small example application to demonstrate changing the default I2C clock rate.

Q:  What new features are planned, and when can we actually expect them?

A:  Plenty.  We will be adding support for various new functionality, including SPI bus support, multi-channel I2C/SMBUS support, block general purpose I/O support, etc..  We intend to implement these features very soon, days or weeks, not months or years, but our initial focus will be solving any compatibility problems that might show up in the initial release (5.0 firmware).

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Last modified: August 25, 2008